David Esseni received the Ph.D. in Electronic Engineering from the University of Bologna, and since 2015 he has been Professor of Electronics at the University of Udine, Italy. During year 2000 he was a visiting scientist at Bell Labs - Lucent Technologies, Murray Hill (NJ-USA), and in 2013 he was awarded a Fulbright Fellowship and spent six months as a Research Scholar at the University of Notre Dame (IN, USA). His research interests are mainly focused on the modelling, experimental characterization and design of semiconductor devices, early circuit assessment of emerging nanoelectronic technologies, novel electronic materials and devices, and memristors for neuromorphic computing.
D.Esseni is a Fellow of the IEEE, EDS Society, and in 2013 he was a Fulbright Fellow in the Research Scholar category.
Publications and Patents
D. Esseni is author of more than 350 publications in peer-reviewed journals and conferences, of the book ”Nanoscale MOS transistors: Semi-classical transport and applications” (Cambridge University Press, Cambridge (UK), 2011) and of several book chapters. His scientific contributions received about 9000 citations with an H-Index of 51 (source: Google Scholar). He is co-author of more than 40 papers (including three invited papers in 2003, 2006 and 2013) presented at the International Electron Devices Meeting (IEDM), which is the worldwide leading conference for electron devices. D. Esseni also holds three U.S.A. patents in the field of non-volatile memories and steep slope transistors.
Appointements and qualifications
+) Full Professor at the University of Udine, since 05/2015;
+) Visiting Professor at the University of Notre Dame (Indiana, U.S.A.) for six months in 2013, thanks to a Fulbright Fellowship in the Research Scholar category;
+) Visiting Scientist at Bell Labs, Lucent Technologies, Murray Hill (NJ, U.S.A.) : 01/2000 - 02/2001.
Fellowships and awards
+) Co-recipient of the Best Paper Award at IEEE European Solid State Device Research Conference (ESSDERC) in 2015;
+) IEEE Electron Devices Society Fellowship for ”contributions to characterization and modeling of mobility and quasi-ballistic transport in MOS transistors”: 2013;
+) Fulbright Fellowship in the Research Scholar category: 2013.
Editorial boards
+) From 2008 to 2017 D.Esseni has been Associate Editor of IEEE Transactions on Electron Devices (TED) and has been co-guest Editor of two special issues of IEEE TED;
+) Since 2021 he is Associate Editor of Frontiers in Electronics.
Steering/organising/technical committee of international conferences
+) D. Esseni has been the General Chair of the “International Conference on Simulation of Semiconductors Processes and Devices, SISPAD 2019” held in Udine;
+) In 2022 he was co-organizer and Chairman of the workshop "BEOL compatible ferroelectric device technologies for neuromorphic computing" in Milano, and part of the Local Organizing Committee for IEEE EUROSOI-ULIS Conference in Udine.
He has been also part of the Local Organizing Committee at the University of Udine for:
+) Insulating Films on Semiconductors Conference, INFOS, held in Udine in 2015;
+) IEEE Conference on the ULtimate Integration on Silicon, ULIS, held in Udine in 2008.
He is or has been part of the Technical Program Committee for:
+) International Electron Devices Meeting, IEDM, (2003-04 and 2015-16);
+) International Reliability Physics Symposium, IRPS, (2007-2010);
+) European Solid-State Device Research Conference, ESSDERC, (since 2006);
+) International Conference on Simulation of Semiconductors Processes and Devices, SISPAD (since 2016).
Grants from public funding agencies and industrial projects
He has been the principal investigator (PI) at the University of Udine for the <b>EU funded projects</b>:
+) BeFerroSynaptic, H2020, GA: 871737 (2020-2023), workpackage leader for modelling and simulations.
+) STEEPER, FP7, GA:257267 (2010-2013).
+) NANOSIL, FP7-ICT-2007-1 (2008-2011).
and for the PRIN project FIVE2D, number 2017SRYEJH (2020-2023.
+) He was workpackage leader for modelling and simulations in the EU funded III-V-MOS project, FP7, GA: 619326, (2014-2017).
In year 2017 he was PI for an exchange a collaboration project between the University of Udine and the Massachusetts Institute of Technology (Boston, USA).
He has also been the PI for several industry driven projects funded by NXP Semiconductors (2008-2010) and TSMC (2011-2016).
As a research team member, he has been involved in several other projects funded by the European Commission in VI and VII Framework Plans (NESTOR, EUROSOI, PULLNANO, NANOFUNCTION, GOSSAMER, MODERN, GRAND, III-V-MOS, E2SWITCH) or by the Italian MIUR (PRIN or FIRB projects).
Supervision of master or PhD students and of postdocs
He has been the thesis advisor for about 40 students, the supervisor for 12 PhD students (3 current), and has supervised the research activities of several postdocs. All his former students have continued a successful scientific or technical career either in high technology companies, research centres, or academia.
Invited papers and invited presentations in international conferences
D. Esseni is frequently invited to give presentations at conferences or to write journal papers. Here are a few recent examples.
+) D.Esseni at the IEEE-IRDS SINANO "Future of Computing and Storage" Workshop, 2022;
+) D.Esseni et al. “Ferroelectric based CMOS devices for energy efficient neuromorphic computing”, NANO Korea 2021;
+) D.Esseni et al. “Ferroelectric based FETs and synaptic devices for highly energy efficient computational technologies”, EDTM Conference 2021, Kobe, Japan;
+) D.Esseni et al. “New device concepts, transistor architectures and materials for high performance and energy efficient CMOS circuits in the forthcoming era of 3D integrated”, EDTM Conference 2018, Kobe, Japan;
D.Esseni, M.Pala, P.Palestri, C.Alper and T.Rollo ”A review of selected topics in physics based modeling for tunnel field-effect transistors” , Semiconductor Science and Technology, Vol.32, pp.083005, 2017.
Prizes/ Awards/ Academy memberships
+) Co-recipient of the Best Paper Award at IEEE European Solid State Device Research Conference (ESSDERC) in 2015;
+) IEEE Electron Devices Society Fellowship: 2013;
+) Fulbright Fellowship in the Research Scholar category: 2013.
Services and Technology Transfer
+) Director of the PhD Programme in Industrial and Information Engineering of the University of Udine: since 2017;
+) Evaluation Panel of the European Science Foundation for the Graphene Flagship: 2014;
+) Board Member of the Inter-University Nanoelectronics Team IUNET: since 2006.