Skip to main content
Nano Electronics logoNano Electronics logo
  • Home
  • The Group
    • Senior staff
      • David Esseni
      • Francesco Driussi
      • Marco Pala
      • Daniel Lizzit
      • Alessandro Pilotto
    • PhD Students and Post-docs
      • Erica Baccichetti
      • Simone Saro
      • Duy Nguyen
      • Marco Massarotto
      • Mattia Segatto
      • Chiara Rossi
    • Visiting Fellows
    • Alumni
  • Research
    • Memristors and neuromorphic computing
    • Quasi 2-D materials and related devices
    • Beyond CMOS FETs for an ultra-low energy electronics
    • Advanced CMOS FETs
    • Transport in nanoelectronic materials and devices
    • Modeling of ion sensors and ion-tronic devices
  • Facilities
    • Research Lab
    • Teaching Lab
  • Teaching
    • Master and Bachelor degrees
    • PhD
    • Mentoring
  • Publications
    • Articles
    • Books/Book chapters
    • Patents
  • News
  • Contacts
  • Home
  • The Group
    • Senior staff
      • David Esseni
      • Francesco Driussi
      • Marco Pala
      • Daniel Lizzit
      • Alessandro Pilotto
    • PhD Students and Post-docs
      • Erica Baccichetti
      • Simone Saro
      • Duy Nguyen
      • Marco Massarotto
      • Mattia Segatto
      • Chiara Rossi
    • Visiting Fellows
    • Alumni
  • Research
    • Memristors and neuromorphic computing
    • Quasi 2-D materials and related devices
    • Beyond CMOS FETs for an ultra-low energy electronics
    • Advanced CMOS FETs
    • Transport in nanoelectronic materials and devices
    • Modeling of ion sensors and ion-tronic devices
  • Facilities
    • Research Lab
    • Teaching Lab
  • Teaching
    • Master and Bachelor degrees
    • PhD
    • Mentoring
  • Publications
    • Articles
    • Books/Book chapters
    • Patents
  • News
  • Contacts

You are here:

  1. Home
  2. News
  3. news details

VLSI conference

06/09/2025

Very large scale integration (VLSI) Symposium 2025

The Symposium on VLSI Technology and Circuits is the premier international conference integrating technology, circuits and systems, providing a forum for technology people and circuit and system designers to discuss recent developments and future directions.

This year, the 42nd VLSI 2025 and its satellite workshops has been held in Kyoto (Japan) on 8-12th of June. At the satellite Silicon Nanoelectronics Workshop (SNW) Marco Massarotto co-first-authored the paper titled “Unified Memcapacitor-Memristor Memory for Synaptic Weights and Neuron Temporal Dynamics", a paper born from Marco's work during his PhD research period abroad in Elisa Vianello's Neuromorphic Group at CEA-Leti in Grenoble (France). 

In this work, a novel memory stack unifies memristive and memcapacitive behaviours, whose dual functionality is exploited to design a neuromorphic circuit that enables simultaneous control of both spatial and temporal dynamics, yielding software-comparable performances for speech-processing and classification.

Back

Dipartimento Politecnico di Ingegneria e Architettura
via delle Scienze 206, 33100 Udine

Directory search

 

  • English

Running with TYPO3 and Bootstrap Package.